Timing Parameter | Description |
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Address propagation delay (tPA) | The time for the address to propagate from the bus controller to all of the potential peripherals. |
Data propagation delay (tPD) | The time for the data to propagate from the data source to all of the potential data receivers. |
Bus propagation delay | The maximum of the separate (Data and Address) propagation delays. |
Setup time (tsetup) | The minimum time that a signal has to be available at the input to the buffer before the active clock signal (edge) arrives. (At the peripheral for a write and at the controller for a read.) |
Hold tine (thold) | The minimum time that data has to be held stable after the clock edge that triggers the transfer. (At the peripheral for a write and at the controller for a read.) |
Select time (tselect) | The time required for a device (or interface) attached to a shared communication media (a bus) to detect that the current transfer involves the device (or interface). This time does not include any of the time required by the device (or interface) to perform any internal address decoding. |
Access time (taccess) | The time required for the interface to access the information for the bus after the device or interface has been selected and the address is correct. The exact order that the select is correct and the address is correct may vary depending on implementation details. The access time is the time following the last of these two events. |
Store time (tstore) | The time required for the interface to enable the correct location and to write the appropriate value into that location after the device (or interface) has been selected and the address is correct. |
Skew time (tskew) | The skew time is the difference (largest – or worst case) in signal propagation times. Although various sets of signals could have different values of skew time (E.g., the address lines or the data lines), one value, the largest, is used in this presentation. |
Margin time | Times where there may be some design flexibility. More generally the margin time is the overdesign that a designer includes for safety to assure successful operation |